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electrical_engineering_and_electronics_1:block08 [2025/10/20 02:17] – mexleadminelectrical_engineering_and_electronics_1:block08 [2025/10/24 20:35] (aktuell) – mexleadmin
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-====== Block 08 — Two-port theory and transforms ======+====== Block 08 — Two-terminal theory and transforms ======
  
 <callout> <WRAP> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>Beispiele Netzwerke.svg}} </WRAP> <callout> <WRAP> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>Beispiele Netzwerke.svg}} </WRAP>
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 ===== Learning objectives ===== ===== Learning objectives =====
 <callout> <callout>
-  * Define **pole** and **port**; distinguish **one-port** (two-pole) vs. **two-port** views; identify input/output variables $(U,I)$ at a port.+  * Define **terminal** and **port**; distinguish **one-port** (two-terminal) vs. **two-port** views; identify input/output variables $(U,I)$ at a port.
   * Apply **source transformations** between a voltage source with series $R$ and a current source with parallel $R$ using $U_0=I_0\,R$; state validity conditions (linear, bilateral, time-invariant networks).   * Apply **source transformations** between a voltage source with series $R$ and a current source with parallel $R$ using $U_0=I_0\,R$; state validity conditions (linear, bilateral, time-invariant networks).
   * Construct **Thevenin** and **Norton** equivalents seen at a port: find $U_{\rm oc}$, $I_{\rm sc}$, and $R_{\rm i}$ by deactivating sources; relate $U_{\rm Th}=U_{\rm oc}$, $R_{\rm Th}=R_{\rm i}$, $I_{\rm No}=I_{\rm sc}$.   * Construct **Thevenin** and **Norton** equivalents seen at a port: find $U_{\rm oc}$, $I_{\rm sc}$, and $R_{\rm i}$ by deactivating sources; relate $U_{\rm Th}=U_{\rm oc}$, $R_{\rm Th}=R_{\rm i}$, $I_{\rm No}=I_{\rm sc}$.
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   * Combine transforms to reduce complex resistive networks to an **unloaded / loaded divider** and to size $R_{\rm L}$ for given performance goals (tie-in to Block 07 figures).   * Combine transforms to reduce complex resistive networks to an **unloaded / loaded divider** and to size $R_{\rm L}$ for given performance goals (tie-in to Block 07 figures).
 </callout> </callout>
 +
 +~~PAGEBREAK~~ ~~CLEARFIX~~
 +===== Preparation at Home =====
 +
 +And again: 
 +  * Please read through the following chapter.
 +  * Also here, there are some clips for more clarification under 'Embedded resources'. 
 +
 +For checking your understanding please do the following exercise:
 +  * 4.5.3
 +
  
 ===== 90-minute plan ===== ===== 90-minute plan =====
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 ===== Core content ===== ===== Core content =====
  
-==== Two-Pole Theory / One-Port Theory ====+==== Two-Terminal Theory / One-Port Theory ====
  
 <WRAP right> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>electrical_engineering_and_electronics_1:TwoPoleTheory01.svg}} </WRAP> <WRAP right> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>electrical_engineering_and_electronics_1:TwoPoleTheory01.svg}} </WRAP>
  
-In order to understand the two-pole theory / one-port theory, we first have to understand what a pole and port is. \\+In order to understand the two-terminal theory / one-port theory, we first have to understand what a Terminal and port is. \\
 So, have a look to <imgref imageNo1>:  So, have a look to <imgref imageNo1>: 
-  - A pole is simply an (imaginary or real) connector. This is shown in the diagram by a filled circle on one wire, plus a semicircle on the other wire +  - A terminal or pole is simply an (imaginary or real) connector. This is shown in the diagram by a filled circle on one wire, plus a semicircle on the other wire 
-  - A port is given by two poles+  - A port is given by two terminals
  
 But, how could this help us in simplifying circuits? \\ But, how could this help us in simplifying circuits? \\
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 ===== Exercises ===== ===== Exercises =====
- 
-==== Quick checks ==== 
- 
-#@TaskTitle_HTML@##@Lvl_HTML@#~~#@ee1_taskctr#~~.1  Title of the first exercise   
-#@TaskText_HTML@#    
- 
-Here is a simple exercise ... 
- 
-#@ResultBegin_HTML~Exercise1~@# 
- 
-Here is the solution of the Exercise 1 
- 
-#@ResultEnd_HTML@# 
-#@TaskEnd_HTML@#  
- 
- 
-#@TaskTitle_HTML@##@Lvl_HTML@#~~#@ee1_taskctr#~~.2  Title of the 2nd exercise   
-#@TaskText_HTML@#    
- 
-Here is another simple exercise ... 
- 
-#@ResultBegin_HTML~Exercise2~@# 
- 
-Here is the solution of the Exercise 2 
- 
-#@TaskEnd_HTML@#  
-#@ResultEnd_HTML@# 
  
 ==== Longer exercises ==== ==== Longer exercises ====