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electrical_engineering_and_electronics_1:block08 [2025/10/20 01:02] – mexleadminelectrical_engineering_and_electronics_1:block08 [2025/10/24 20:35] (aktuell) – mexleadmin
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-====== Block 08 — Two-port theory and transforms ======+====== Block 08 — Two-terminal theory and transforms ======
  
 <callout> <WRAP> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>Beispiele Netzwerke.svg}} </WRAP> <callout> <WRAP> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>Beispiele Netzwerke.svg}} </WRAP>
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 On the {{https://en.wikipedia.org/wiki/Network_analysis_(electrical_circuits)|wiki page for network analysis}}  the different methods are described very well in a compact way </callout> On the {{https://en.wikipedia.org/wiki/Network_analysis_(electrical_circuits)|wiki page for network analysis}}  the different methods are described very well in a compact way </callout>
  
 +===== Learning objectives =====
 <callout> <callout>
 +  * Define **terminal** and **port**; distinguish **one-port** (two-terminal) vs. **two-port** views; identify input/output variables $(U,I)$ at a port.
 +  * Apply **source transformations** between a voltage source with series $R$ and a current source with parallel $R$ using $U_0=I_0\,R$; state validity conditions (linear, bilateral, time-invariant networks).
 +  * Construct **Thevenin** and **Norton** equivalents seen at a port: find $U_{\rm oc}$, $I_{\rm sc}$, and $R_{\rm i}$ by deactivating sources; relate $U_{\rm Th}=U_{\rm oc}$, $R_{\rm Th}=R_{\rm i}$, $I_{\rm No}=I_{\rm sc}$.
 +  * Use the **superposition principle** to compute branch currents/voltages in multi-source linear networks; outline the deactivate–solve–sum workflow.
 +  * Combine transforms to reduce complex resistive networks to an **unloaded / loaded divider** and to size $R_{\rm L}$ for given performance goals (tie-in to Block 07 figures).
 +</callout>
  
-  * recap  +~~PAGEBREAK~~ ~~CLEARFIX~~ 
-  * two-pole theory +===== Preparation at Home =====
-  * superposition +
  
 +And again: 
 +  * Please read through the following chapter.
 +  * Also here, there are some clips for more clarification under 'Embedded resources'. 
 +
 +For checking your understanding please do the following exercise:
 +  * 4.5.3
  
-===== Learning objectives ===== 
-<callout> 
-  * Define / Distinguish / Apply / Use ...  
-</callout> 
  
 ===== 90-minute plan ===== ===== 90-minute plan =====
-  - Warm-up (5–10 min):  +  - Warm-up (8 min): 
-    - Recall / Quick quiz ... +    - Quick quiz on passive/active sign convention and $P=U\cdot I$ (from Block 07). 
-  - Core concepts & derivations (60–70 min):   +    - Identify ports and choose measurement directions on 2–3 small circuits. 
-    - ... +  - Core concepts & derivations (58 min): 
-  - Practice (10–20 min): ... +    - (1) **Source transformations** ($U_0\leftrightarrow I_0$, shared $R$), permissible assumptions, and fast checks (10 min). 
-  - Wrap-up (5 min): ...+    - (2) **Thevenin/Norton construction** at a chosen port: $U_{\rm oc}$, $I_{\rm sc}$, $R_{\rm i}$ (18 min). 
 +    - (3) **Superposition method**: deactivate sources, compute partial results, sum; worked DC example (15 min). 
 +  - Practice (20 min): 
 +    - Pair exercise set: reduce a 3-source network to Thevenin, then find $U_{\rm L}$, $I_{\rm L}$. 
 +  - Wrap-up (5 min): 
 +    - Summary table (when to use which method); minute paper: “One thing I can now do, one question I still have.” 
  
 ===== Conceptual overview ===== ===== Conceptual overview =====
 <callout icon="fa fa-lightbulb-o" color="blue"> <callout icon="fa fa-lightbulb-o" color="blue">
-  - ...+  - **Port thinking:** Draw a virtual cut around the “rest of the world”. At that boundary (two terminals), everything inside looks like an equivalent **linear source** (Thevenin/Norton) to everything outside. 
 +  - **Source transformations:** A series source $(U_0, R)$ is equivalent to a parallel source $(I_0, R)$ if $U_0=I_0\,R$. Use them to simplify ladders and to expose a clean port. 
 +  - **Thevenin/Norton from measurements:** 
 +    - Open-circuit the load → measure/compute $U_{\rm oc}=U_{\rm Th}$. 
 +    - Short the load (only if safe/valid) → $I_{\rm sc}=I_{\rm No}$. 
 +    - Deactivate sources → compute the internal resistance $R_{\rm i}=R_{\rm Th}=R_{\rm No}$. 
 +  - **Superposition (linear networks only):** Voltages and currents **add**; powers do **not**. For each source: deactivate the others (ideal $U$-sources → short; ideal $I$-sources → open), solve the partial, then sum with signs. 
 +  - **Choosing a method:** Use source transforms for quick topology changes, Thevenin/Norton to isolate a load, and superposition when multiple sources block easy reduction.
 </callout> </callout>
  
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 ===== Core content ===== ===== Core content =====
  
-==== 1st sub-chapter ====+==== Two-Terminal Theory / One-Port Theory ==== 
 + 
 +<WRAP right> <imgcaption imageNo1 | examples for networks> </imgcaption> {{drawio>electrical_engineering_and_electronics_1:TwoPoleTheory01.svg}} </WRAP> 
 + 
 +In order to understand the two-terminal theory / one-port theory, we first have to understand what a Terminal and port is. \\ 
 +So, have a look to <imgref imageNo1>:  
 +  - A terminal or pole is simply an (imaginary or real) connector. This is shown in the diagram by a filled circle on one wire, plus a semicircle on the other wire 
 +  - A port is given by two terminals 
 + 
 +But, how could this help us in simplifying circuits? \\ 
 +Well: Usually, the voltage over or the current into one component or a group of component has to be found. \\ 
 +Now, it is practical, that  
 +  * you can substitue every passive linear part (= consisting only of resistors) by a single equivalent resistor. 
 +  * you can substitue every active linear part (= consisting of resistors and sources) by a single equivalent linear source. 
 + 
 +A linear part is here a cirucit consisting of linear components. 
 +In general, ohmic resistors, sources, capacitors and inductors are linear - here, we only look onto resistors. (non-linear are most of the semiconductor components, like diodes).  
 + 
 +So, what can we do?  
 +Once you search for a distinct voltage or current: 
 +  - Imagine a virtual cut around this part. You get a passive linear part and a active linear part. 
 +  - Calculate the single equivalent resistor and single equivalent linear source. You get an unloaded voltage divider. 
 +  - Calculate the voltage divider 
 + 
 +Voilà, we have a way to find our desired voltage or current in a complicated circuitry.   
 + 
 +~~PAGEBREAK~~ ~~CLEARFIX~~ <callout icon="fa fa-exclamation" color="red" title="Hint:">  
 +There is a trick to get the internal resistance of the source easily, so without continuous back-and-forth beween linear voltage source and linear current source: 
 + 
 +When one is only interested in the resistance of a complex circuit, do as follows:  
 +  - substitute every ideal source with its internal resistance (ideal voltage source → short circuit, ideal current source → unconnected). 
 +  - calculate the eqivalent resistance by means of series and parallel sub-circuits. 
 +</callout>
  
-... 
  
 ====  Superposition Principle ==== ====  Superposition Principle ====
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
- 
-==== n'th sub-chapter ==== 
- 
-... 
- 
 ===== Common pitfalls ===== ===== Common pitfalls =====
-  * ... +  * **Deactivating sources incorrectly:** replacing an ideal voltage source with an **open** (instead of a short), or an ideal current source with a **short** (instead of an open). 
-  ...  +  * **Superposing powers:** only **$u$** and **$i$** superpose; $P$ does not. Compute powers **after** summing. 
 +  * **Illegal short/open tests:** shorting across an element that cannot be shorted (e.g., an ideal current source without care) or opening where it breaks circuit definitions. 
 +  * **Sign/arrow mismatches:** mixing passive/active sign conventions leads to wrong partial signs in superposition. 
 +  * **Applying linear methods to non-linear/time-varying parts:** Thevenin/Norton and superposition require **linearity** (and usually bilateral behavior). 
 +  * **Ignoring loading:** using the unloaded divider ratio $\dfrac{R_2}{R_1+R_2}$ while a finite $R_{\rm L}$ is attached → systematic voltage error. 
      
 ===== Exercises ===== ===== Exercises =====
- 
-==== Quick checks ==== 
- 
-#@TaskTitle_HTML@##@Lvl_HTML@#~~#@ee1_taskctr#~~.1  Title of the first exercise   
-#@TaskText_HTML@#    
- 
-Here is a simple exercise ... 
- 
-#@ResultBegin_HTML~Exercise1~@# 
- 
-Here is the solution of the Exercise 1 
- 
-#@ResultEnd_HTML@# 
-#@TaskEnd_HTML@#  
- 
- 
-#@TaskTitle_HTML@##@Lvl_HTML@#~~#@ee1_taskctr#~~.2  Title of the 2nd exercise   
-#@TaskText_HTML@#    
- 
-Here is another simple exercise ... 
- 
-#@ResultBegin_HTML~Exercise2~@# 
- 
-Here is the solution of the Exercise 2 
- 
-#@TaskEnd_HTML@#  
-#@ResultEnd_HTML@# 
  
 ==== Longer exercises ==== ==== Longer exercises ====
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 </WRAP> </WRAP>
  
-<WRAP column half> 
-Here are the youtube resource 2 
-{{youtube>...}} 
-</WRAP> 
- 
-...