| Beide Seiten der vorigen Revision Vorhergehende Überarbeitung | |
| circuit_design:uebung_3.5.5 [2021/12/09 02:19] – tfischer | circuit_design:uebung_3.5.5 [2023/03/28 10:51] (aktuell) – mexleadmin |
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| <panel type="info" title="Exercise 3.5.5. Linear Voltage Regulator"> <WRAP group><WRAP column 2%>{{fa>pencil?32}}</WRAP><WRAP column 92%> | <panel type="info" title="Exercise 3.5.5. Linear Voltage Regulator"> <WRAP group><WRAP column 2%>{{fa>pencil?32}}</WRAP><WRAP column 92%> |
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| In order to get a constant (lower) voltage from an higher voltage input or a source with a broader spread of the voltage (e.g. a battery) often linear regulators are used. | In order to get a constant (lower) voltage from a higher voltage input or a source with a broader spread of the voltage (e.g. a battery) often linear regulators are used. |
| One example could be to get $5V$ from the car battery voltage (between $11V...14V$) for a microcontroller in a control unit e.g. the brake control unit. | One example could be to get $5 ~\rm V$ from the car battery voltage (between $11 ~\rm V...14 ~\rm V$) for a microcontroller in a control unit e.g. the brake control unit. |
| Linear regulator here means that a transistor as a variable resistor is used to drop the unwanted voltage. | Linear regulator here means that a transistor as a variable resistor is used to drop the unwanted voltage. |
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| Below, two types of such a linear regulator are shown | Below, two types of such linear regulators are shown |
| - The first simuation shows a simple series regulator with a FET. "Series" here marks the fact that the transistor is in series to the load resistor $R_L$. The zener diode $D$ has a current limiting series resistors $R_D$ ahead. By the voltage divider of $R_D$ and $D$, a relatively constant voltage will be created. | - The first simulation shows a simple series regulator with a FET. "Series" here marks the fact that the transistor is in series to the load resistor $R_\rm L$. The Zener diode $D$ has a current limiting series resistors $R_\rm D$ ahead. By the voltage divider of $R_\rm D$ and $D$, a relatively constant voltage will be created. |
| - The second simulation shows a more sophisticated circuit. Here, there is a feedback from the output of the transistor back to the transistor controlling voltage. This feedback is given by $R1$, $R2$ and the operational amplifier. | - The second simulation shows a more sophisticated circuit. Here, there is feedback from the output of the transistor back to the transistor controlling voltage. This feedback is given by $R1$, $R2$, and the operational amplifier. |
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| Tasks | Tasks |
| * In both simulations there are two sliders on the right-hand side: \\ - //Input Voltage//, which changes the ingoing voltage between $5V...20V$ \\ - //Load Resistance//, which changes the load on the output between $10\Omega...1k\Omega$ \\ Play with these sliders and look for the differences! What are these? | * In both simulations there are two sliders on the right-hand side: \\ - //Input Voltage//, which changes the ingoing voltage between $5~\rm V...20~\rm V$ \\ - //Load Resistance//, which changes the load on the output between $10~\Omega...1~\rm k\Omega$ \\ Play with these sliders and look for the differences! What are these? |
| * The lower simulation with the operational amplifier is also called "**L**ow **D**rop**O**out" (**LDO**). The dropout is the minimum voltage difference on the transistor. How can the terminology low dropoff can be explained? | * The lower simulation with the operational amplifier is also called "**L**ow **D**rop**O**out" (**LDO**). The dropout is the minimum voltage difference on the transistor. How can the terminology low dropoff can be explained? |
| * To which primitive OpAmp circuit does the LDO circuit ($R_1$, $R_2$ and OpAmp) look similar to? \\ How can the controlling of the transistor input voltage $U_GS$ be explained? | * To which primitive OpAmp circuit does the LDO circuit ($R_1$, $R_2$ and OpAmp) look similar to? \\ How can the controlling of the transistor input voltage $U_{\rm GS}$ be explained? |
| * Given a load resistor of $R_L=1k\Omega$, an input voltage $U_I=20V$ and an output voltage $U_O=5V$, what is the dissipated power on the load and on the transistor? | * Given a load resistor of $R_\rm L=1~\rm k\Omega$, an input voltage $U_\rm I=20~\rm V$, and an output voltage $U_\rm O=5~\rm V$, what is the dissipated power on the load and on the transistor? |
| * One LDO is the [[https://www.ti.com/lit/ds/symlink/tps746.pdf|TPS746]]. \\ - What is the Pin $FB$ for? \\ - How does the [[https://www.ti.com/lit/ds/symlink/lm340.pdf|LM7805]] differ with view onto setup in a circuit? | * One LDO is the [[https://www.ti.com/lit/ds/symlink/tps746.pdf|TPS746]]. \\ - What is the Pin $\rm FB$ for? \\ - How does the [[https://www.ti.com/lit/ds/symlink/lm340.pdf|LM7805]] differ regarding the set-up in a circuit? |
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