circuit_design:8_further_aspects [MEXLE Wiki]

Diese Seite ist nicht editierbar. Sie können den Quelltext sehen, jedoch nicht verändern. Kontaktieren Sie den Administrator, wenn Sie glauben, dass hier ein Fehler vorliegt.
====== Advanced simulations ======

<WRAP right><panel type="default">
<imgcaption pic3|JFET Pinch Off>
</imgcaption>
{{drawio>>JFET}}
</panel>
</WRAP>

===== Junction Field Effect Transistor (JFET) =====

The structure of the junction field effect transistor (JFET)** resembles the bipolar transistor at first glance. In <imgref pic3>, the individual images (1)...(3) show the layering of an n-channel (English n-channel) JFET and the circuit symbol in the upper left. In contrast to the pnp bipolar transistor, however, here the p-doped layers are jointly supplied with voltage and the n-doped layer is transversely fluxed.

Without voltage difference $U_{GS}$ between gate and source, a (small) junction is formed at the p-n junctions. Electrons can flow unhindered through the n-doped layer: a current $I_G \gg 0$ flows through the FET (<imgref pic3> Fig. (1)).  The "path" between the two junction layers is called the **n-channel**.

<WRAP right><panel type="default">
<imgcaption pic3|JFET Pinch Off>
</imgcaption>
{{drawio>Pinch_off}}
</panel>
</WRAP>

When the voltage difference $U_{GS}$ becomes smaller than zero, the junction layers increase, and the diode between G and S is operated in the reverse direction. The n-channel is constricted and geometrically decreases the electron or current flow $I_G$ (<imgref pic3> Fig. (2)). At a certain voltage $U_{GS}=U_p$ (**pinch-off or pinch-off voltage**), the two junction layers are so large that no n-channel is left - the channel is **pinched-off** (<imgref pic3> figure (3)). Above this voltage, there can be no current flow.
The principle is thus similar to the situation when the flow from a water hose is regulated by squeezing the hose.

In the simulation on the right, the same voltage ratios are shown. The toggle switch on the left makes it possible to invert the voltage $U_{DS}$ via the transistor. If this becomes negative, a slightly different situation arises: The JFET seems to become conductive in all, regardless of what voltage $U_{GS}$ assumes.


<WRAP right>{{url>https://www.falstad.com/circuit/circuitjs.html?cct=$+17+0.0001+0.17188692582893286+56+1+50%0Aw+-656+208+-656+256+0%0Ax+-584+265+-564+268+4+40+%E2%86%93%0Ax+-635+261+-609+264+4+18+GS%0Ax+-647+255+-582+258+4+18+U%5Cs%5Cs%5Cs%5Cs%5Cq0V%0Aw+-560+272+-560+288+0%0A181+-560+128+-560+176+0+263523.42054887675+0.000012+0.1+0.0001+0.0001%0Aw+-560+224+-560+272+0%0Ax+-634+183+-622+186+4+18+R%0Aw+-656+304+-560+304+0%0Av+-656+304+-656+256+0+0+40+0+0+0.576+0.5%0Aw+-560+304+-560+288+0%0Ar+-656+208+-592+208+0+1000%0AR+-752+160+-752+128+0+0+80+10+0+0+0.5%0Ag+-560+304+-560+320+0%0Aj+-592+208+-560+208+32+-4+0.00125%0Aw+-560+176+-560+192+0%0Ax+-622+192+-608+195+4+18+G%0Ax+-624+363+-595+366+4+24+(1)%0Ax+-432+363+-403+366+4+24+(2)%0Ax+-240+363+-198+366+4+24+(3a)%0A207+-560+128+-560+112+4+VDD%0A207+-736+192+-736+208+4+VDD%0AS+-736+192+-736+160+0+0+false+0+2%0AR+-720+160+-720+128+0+0+80+-10+0+0+0.5%0Ax+-593+201+-579+204+4+18+G%0Ax+-550+233+-538+236+4+18+S%0Ax+-550+200+-538+203+4+18+D%0Ax+-358+200+-346+203+4+18+D%0Ax+-358+233+-346+236+4+18+S%0Ax+-401+201+-387+204+4+18+G%0A207+-368+128+-368+112+4+VDD%0Ax+-430+192+-416+195+4+18+G%0Aw+-368+176+-368+192+0%0Aj+-400+208+-368+208+32+-4+0.00125%0Ag+-368+304+-368+320+0%0Ar+-464+208+-400+208+0+1000%0Aw+-368+304+-368+288+0%0Av+-464+304+-464+256+0+0+40+-3+0+0.576+0.5%0Aw+-464+304+-368+304+0%0Ax+-442+183+-430+186+4+18+R%0Aw+-368+224+-368+272+0%0A181+-368+128+-368+176+0+1423.5035868843697+0.000012+0.1+0.0001+0.0001%0Aw+-368+272+-368+288+0%0Ax+-455+255+-384+258+4+18+U%5Cs%5Cs%5Cs%5Cs%5Cq-3V%0Ax+-443+261+-417+264+4+18+GS%0Ax+-387+265+-367+268+4+40+%E2%86%93%0Aw+-464+208+-464+256+0%0Ax+-166+200+-154+203+4+18+D%0Ax+-166+233+-154+236+4+18+S%0Ax+-209+201+-195+204+4+18+G%0A207+-176+128+-176+112+4+VDD%0Ax+-238+192+-224+195+4+18+G%0Aw+-176+176+-176+192+0%0Aj+-208+208+-176+208+32+-4+0.00125%0Ag+-176+304+-176+320+0%0Ar+-272+208+-208+208+0+1000%0Aw+-176+304+-176+288+0%0Av+-272+304+-272+256+0+0+40+-5+0+0.576+0.5%0Aw+-272+304+-176+304+0%0Ax+-250+183+-238+186+4+18+R%0Aw+-176+224+-176+272+0%0A181+-176+128+-176+176+0+300.00000181352283+0.000012+0.1+0.0001+0.0001%0Aw+-176+272+-176+288+0%0Ax+-263+255+-192+258+4+18+U%5Cs%5Cs%5Cs%5Cs%5Cq-5V%0Ax+-251+261+-225+264+4+18+GS%0Ax+-197+264+-177+267+4+40+%E2%86%93%0Aw+-272+208+-272+256+0%0Aw+32+224+16+224+0%0Aw+32+192+16+192+0%0Ad+32+224+32+192+2+default%0Aw+-80+208+-80+256+0%0Ax+-5+264+15+267+4+40+%E2%86%93%0Ax+-59+261+-33+264+4+18+GS%0Ax+-71+255+0+258+4+18+U%5Cs%5Cs%5Cs%5Cs%5Cq-5V%0Aw+16+272+16+288+0%0A181+16+128+16+176+0+300.0000133615205+0.000012+0.1+0.0001+0.0001%0Aw+16+224+16+272+0%0Ax+-58+183+-46+186+4+18+R%0Aw+-80+304+16+304+0%0Av+-80+304+-80+256+0+0+40+-5+0+0.576+0.5%0Aw+16+304+16+288+0%0Ar+-80+208+-16+208+0+1000%0Ag+16+304+16+320+0%0Aj+-16+208+16+208+32+-4+0.00125%0Aw+16+176+16+192+0%0Ax+-46+192+-32+195+4+18+G%0A207+16+128+16+112+4+VDD%0Ax+-17+201+-3+204+4+18+G%0Ax+-48+363+-6+366+4+24+(3b)%0A 700,300 noborder}}
</WRAP>
~~PAGEBREAK~~ ~CLEARFIX~~

===== Digital Analogue Converter (DAC) =====

<WRAP right>{{url>https://www.falstad.com/circuit/circuitjs.html?cct=$+1+0.00019999999999999998+0.23009758908928252+55+5+50%0Aa+352+176+416+176+8+15+-15+1000000+0.000010000224972250687+0+100000%0Ag+480+192+480+208+0%0Ar+352+112+416+112+0+1600.1000000000001%0Aw+416+112+416+176+0%0A368+576+112+640+112+0+0%0Ar+288+160+352+160+0+8000%0Ar+288+112+352+112+0+4000%0Aw+352+144+352+160+0%0Ar+288+64+352+64+0+2000%0Ar+288+16+352+16+0+1000%0Aw+352+112+352+144+0%0Aw+352+64+352+16+0%0AL+288+160+176+160+0+1+false+5+0%0AL+272+112+176+112+0+0+false+5+0%0AL+256+64+176+64+0+0+false+5+0%0AL+240+16+176+16+0+0+false+5+0%0Aw+352+112+352+64+0%0A197+368+-192+384+-208+0%0A157+496+-192+512+-208+0+7+0+0%0Aw+496+-64+560+-64+0%0Aw+496+-32+592+-32+0%0Aw+592+-32+592+-64+0%0Aw+496+0+624+0+0%0Aw+624+0+624+-64+0%0Aw+288+160+288+-96+0%0Aw+368+-96+288+-96+0%0Aw+368+-128+272+-128+0%0Aw+272+-128+272+112+0%0Aw+272+112+288+112+0%0Aw+256+64+288+64+0%0Aw+256+64+256+-160+0%0Aw+256+-160+368+-160+0%0Aw+240+16+288+16+0%0Aw+240+16+240+-192+0%0Aw+240+-192+368+-192+0%0Aa+512+176+576+176+8+15+-15+1000000+-0.000010000024971751254+0+100000%0Ag+320+192+320+208+0%0Ar+512+112+576+112+0+10000%0Aw+576+176+576+112+0%0Aw+512+160+512+112+0%0Ar+448+112+512+112+0+10000%0Aw+320+192+352+192+0%0Aw+480+192+512+192+0%0Aw+416+112+448+112+0%0Ab+448+64+605+230+0%0A38+5+0+1000+20000+R1%0A38+6+0+1000+20000+R2%0A38+8+0+1000+20000+R3%0A38+9+0+1000+20000+R4%0A 600,600 noborder}}
</WRAP>

In chapter 3, a digital-to-analog converter was described in [[3_basic_circuits_i#tasks|task 3.5.3]]. The R-2R ladder described there allows a pure digital value to be output as an analog voltage as an integrated circuit. In the simulation on the right a simplified version can be seen. However, the simplified version requires many very precisely tuned resistors. In contrast, the R-2R ladder requires only 2 resistor values and this is easier to manufacture in terms of microsystem technology.

~PAGEBREAK~ ~CLEARFIX~~
===== Time Domain - Frequency Domain =====

=== arbitrary periodic signals ===

<WRAP right><imgcaption pic5|Superposition of sinusoidal oscillations>
{{electronic_circuitry:fourier_transform_time_and_frequency_domains.gif}}
</imgcaption> </WRAP>

At the previous chapter a sinusoidal input voltage was used for the analysis. How do the filters work Here we want to focus on it again.

In <imgref pic5> it can be seen that a square wave signal can be approximated by several sinusoidal signals. If the amplitudes of these signals are plotted versus frequency, an image of the signal in the frequency domain is obtained. This transformation is done computationally via the [[https://de.wikipedia.org/wiki/Fourier-Transformation|Fourier transform]] and is treated in detail in advanced subjects such as control engineering, signals and systems and digital signal processing.

For very fast changes, high-frequency components are required.

Already with the [[4_grundschaltungen_ii#umkehraddierer|Umkehraddierer]] it became apparent that a periodic sawtooth signal can be assembled from several sinusoidal voltages.

~~PAGEBREAK~~~CLEARFIX~~~

<WRAP right><imgcaption pic6|Superposition of sinusoidal oscillations>
{{electronic_circuitry:fourier_series_square_wave_circles_animation.gif}}
</imgcaption> </WRAP>

<WRAP right><imgcaption pic7|Approximation of any signal>
{{electronic_circuitry:example_of_fourier_convergence.gif}}
</imgcaption> </WRAP>

From the sinus

The video [[https://www.youtube.com/watch?v=r6sGWTCMz2k|But what is a Fourier series?]] explains clearly how even vector images can be generated by superimposing sine functions.